1. Field of the Invention
The present invention relates to semiconductor fabrication and, more particularly, to selective oxidation of semiconductors, such as silicon, with respect to highly conductive materials such as metals or metal alloys present during gate formation in atmospheric pressure processing.
2. Description of the Related Art
The present-day fabrication of semiconductor devices and circuits is a complex multi-step process. Generally, devices are formed in a semiconductor substrate and additional devices are formed over the substrate. Typically, the upper surface of the substrate will have conductive elements and will also have insulating elements separating the conductive elements. For example, conductive traces and electrodes, such as the gate electrodes of metal-oxide-semiconductor-field-effect transistor (MOSFET) devices, or the interconnecting conductors are formed from a conductive material such as polysilicon or a metal. It is also desirable to oxidize certain components of a semiconductor device; however, such oxidation can result in increased resistance of the conductive elements of the semiconductor device.
This particular problem is illustrated in connection with the formation of metal-oxide-semiconductor-field-effect transistors (MOSFET). The metal-oxide-semiconductor-field-effect transistor (MOSFET), used extensively in electronic devices, has a fundamental structure in which a gate material is formed over a gate oxide, which in turn overlies a semiconductor substrate that is typically single-crystal silicon.
Doped polycrystalline silicon (polysilicon) or doped amorphous silicon is often used in transistor gate construction and imparts desirable conductivity characteristics to the semiconductor device. Some of the more important benefits derived from using polysilicon include its high melting point, low reactivity with gate oxides, and reduced dopant depletion characteristics when compared to that of metals deposited directly over gate oxide.
Polysilicon layers, however, exhibit increased resistivity compared to traditional metal layers and result in higher overall interconnect resistance when used exclusively in gate electrode formation. The increased resistance of polysilicon combined with the continual desire to scale down device dimensions, results in greater power consumption, long propagation delays, and slower access speeds in the small cross-sectional line area through which current can be conducted in the polysilicon layer.
The negative effects encountered when using exclusively polysilicon gates in electrode formation, can be countered by the addition of a highly conductive layer (e.g. metal, metal silicide, and/or metal nitride) over the gate polysilicon. The addition of the highly conductive layer results in a lowering of the overall resistivity of the interconnect lines while retaining the gate integrity provided by polysilicon. Typically, a layer of metal silicide is formed over the polysilicon with an additional metal layer overlying the metal silicide. Alternatively, a metal layer may be deposited directly over the polysilicon, without the intervening metal silicide, depending upon stress and adhesion factors. In either case, the metal layer serves to further reduce the resistivity of the gate stack, reduces the power requirements for each feature, and allows for smaller component size.
As illustrated in FIG. 1A, a classical process of transistor manufacture, known in the prior art, comprises depositing the desired layers on top of a single-crystal silicon substrate 110 on which has been grown a gate oxide layer. The gate electrode is formed in accordance with an integrated circuit design using an etching procedure that removes selected areas and their component layers from the single-crystal silicon substrate 110. The process begins with photolithographic patterning of the area defining the gate electrode to create a resist mask 101. The resist mask 101 protects covered areas below, while adjacent areas 114, that do not have a resist mask layer, are removed by subsequent etching steps. The gate electrode is comprised of a stack of materials that may include: a polysilicon layer 106, a metal nitride layer 104, a metal or metal alloy layer 102 or a stacked combination of these layers.
As illustrated in FIG. 1B, a series of etches, such as plasma etches, are utilized to create a vertical profile defining the sides 112 of the gate electrode 100. Additionally, in some applications, an insulating layer or layers is deposited over the aforementioned layers and is etched at the same time as the underlying layers. The polysilicon layer 106 of the gate structure, typically the last of the stack materials to be etched, is usually etched by fluorine- or chlorine-based plasmas.
When the etching process is complete, the uppermost resist layer 101 of the gate electrode 100 is removed, leaving the layers below intact. The resulting gate stack comprises the metal or metal alloy 102 as the new uppermost layer, with the metal nitride 104 and polysilicon layers 106 below. The process of plasma etching, as well as other anisotropic etching procedures using ion bombardment, may cause considerable physical and chemical damage to the gate oxide 108 underlying the polysilicon layer 106 as well as to the supporting layer consisting of the silicon substrate 110. The resulting damage can be seen as a physical thinning 122 of the gate oxide layer 108 that was exposed to the etching compounds. Thinning of the gate oxide layer 108, particularly at or near the edges of the gate electrode 124A, 124B, renders the gate electrode susceptible to punchthrough or tunneling current leakage. In turn, junction leakage results in increased threshold voltage and unreliable circuit operation. Furthermore, plasma etching tends to damage oxide bonds, creating charge trap sites. Such structural damage extends laterally under the gate edges 124A, 124B as well as over source/drain regions 126, 127. This damage must be repaired by a source/drain reoxidation step to improve the quality and life expectancy of the gate oxide 108. The physical gate edge is also a location of high electric fields which naturally limits the electrical breakdown voltage of the transistor gate, even without the etch damage at the corners.
The reoxidation process typically involves a wet oxidation at temperatures above 800xc2x0 C. for a relatively long period (in excess of 30 minutes). As shown in FIG. 1C, reoxidation forms an additional layer of oxide 123 over exposed regions of the gate electrode 100 as well as on the surface of the gate oxide 108. Reoxidation results in the gate oxide areas 108 being xe2x80x9crepairedxe2x80x9d by thickening the oxide layer after etching. Furthermore, the gate electrode corners 124A, 124B are rounded by the formation of an oxide layer and serve to reduce the electric field strength in active areas adjacent to the gate electrode 100.
While the source/drain reoxidation of the gate electrode and surrounding area is a necessary step in transistor manufacture, its use introduces a new problem into the manufacturing process in that the conductive layers 102, 104 present over the gate polysilicon 104 may become overly oxidized. Typically, metals used in gate electrode formation have a low oxidation resistance (particularly tungsten and tungsten nitride). Under the conditions where source/drain oxidation takes place, oxidation of the metal gate electrode will occur concomitantly. Oxidation of the metal produces metal oxides that have insulating properties which are not desirable as the overall resistance of the gate may be radically increased. Longer reoxidation processing times and higher reacting temperatures result in more of the metal or metal alloy layer 102 being consumed, increasing the metal oxide presence 120. Thus, benefits derived from adding a highly conductive metal layer may be attenuated unless the formation of metal oxide 120 can be reduced.
Undesirable oxide formation is a problem that pervades many aspects of integrated circuit/semiconductor manufacture. As described above, there are occasions where components of a device may need to be oxidized in the presence of additional components whose oxidation is undesirable. In such instances, a selective oxidation may be required to oxidize the desired components. Selective oxidation thus employs methods that will preferentially oxidize the desired components while at the same time minimize or prevent oxidation of other components whose properties may be adversely affected by oxidation.
The undesirable oxide formation is often the result of ambient oxygen being present in the chamber when the semiconductor wafer is positioned within the oxidation chamber. Typically, when the chamber is at an elevated temperature, the ambient oxygen present in the atmosphere of the chamber attacks and oxidizes the metal layers of the semiconductor devices, such as the metal gate electrodes of a MOSFET transistor. Hence, even when oxidation techniques that are less aggressive in oxidizing the metal layers are used, there is still a problem with undesired oxidation of the metal layers.
References in the prior art attempt to prevent the problems associated with undesirable oxidation, such as metal gate electrode oxidation, during source/drain oxidation. Metal gate electrode oxidation prevention has been proposed using atmosphere switching. This method involves pumping the process chamber down to a lowered pressure. As a result of the lowered pressure, the atmosphere""s gaseous constituents inside the chamber can be altered by backfilling with a new gaseous composition. The use of an inert gas to be used during backfilling has been proposed to reduce the extent to which a metal gate electrode is oxidized. These pressure reduction processes suffer from a number of disadvantages including; 1) increased process time resulting from the requirement to pump and purge the processing and loading chambers; 2) increased complexity and potential for device failure resulting from the atmospheric switching apparatus; and 3) higher cost of ownership both in initial design and purchase of the system as well as ongoing maintenance costs.
Hence, there is an ongoing need for techniques that will allow selective oxidation of materials on a semiconductor device. To this end, there is a need for shielding components or materials of the semiconductor device from unwanted oxidation either during or prior to oxidation of other components or materials of the device in a manner that does not significantly decrease the efficiency of the process for manufacturing the semiconductor device.
The aforementioned needs are satisfied by the method of selectively oxidizing an element on a semiconductor device of the present invention. In one aspect, the method comprises positioning a semiconductor device in an oxidation chamber and introducing a passivating gas into the chamber wherein the passivating gas is selected to simultaneously interact with the protected element so as to inhibit oxidation of the protected element by oxidants in the chamber (e.g., residual oxygen and air introduced when the chamber is opened).
By both passivating the surface of the protected element prior to S/D reoxidation and employing a selective reoxidation process, oxidation of the protected element in the oxidation chamber can be reduced. In one aspect, the passivating gas comprises a reducing gas such as hydrogen. The passivating gas may also comprise an inert gas such as argon, which does not react with the protected element.
In one illustrated embodiment, the passivating gas is introduced into the oxidation chamber during a temperature ramping process prior to temperature ramp up and its presence is maintained through oxidation and subsequent temperature ramp down. A selective oxidizing species is introduced into the chamber following temperature ramp up to result in a selective oxidation of the semiconductor device. As described, this method of selective oxidation is suitable for accomplishing source/drain oxidation of the semiconductor device in a rapid thermal processor, batch furnace, or other reaction vessel and reduces the amount of undesirable oxidation which takes place due to the presence of oxygen in the ambient atmosphere.